Micron was granted a patent for vertically stacked memory with distributed controls.

{
  "signal_id": "3d75254a-b4f5-5599-bcf9-f3037acaf320",
  "signal_type": "patents-company",
  "signal_subtype": "patentGrant",
  "detected_at": "2026-10-30T01:06:16+00:00",
  "company": {
    "name": "Micron",
    "domain": "micron.com"
  },
  "data": {
    "cpc": [
      {
        "code": "H10B 12/315"
      },
      {
        "code": "G11C 11/4087"
      },
      {
        "code": "H05K 3/103",
        "label": "Printed circuits; casings; manufacture of electrical assemblages"
      },
      {
        "code": "H10B 41/27"
      },
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    ],
    "tags": [
      "Intellectual Property",
      "Research & Development",
      "Engineering",
      "Manufacturing Operations"
    ],
    "detail": "In October 2026 Micron patented a memory architecture for higher-density data storage, designed for use in advanced memory devices and electronic systems.",
    "summary": "Micron was granted a patent for vertically stacked memory with distributed controls.",
    "event_at": "2026-10-27",
    "inventors": [
      {
        "name": "Fatma Arzum Simsek-Ege",
        "status": "unresolved",
        "is_primary": true
      }
    ],
    "event_kind": "grant_date",
    "grant_date": "2026-10-27",
    "source_url": "https://patents.google.com/patent/US12777632",
    "cpc_primary": {
      "code": "H10B 12/315"
    },
    "patent_title": "Microelectronic devices including vertically stacked structures with distributed control logic regions, and related electronic systems and methods",
    "patent_number": "US12777632",
    "uspto_assignee": "Micron Technology, Inc.",
    "patent_abstract": "A microelectronic device comprises a first microelectronic device structure and a second microelectronic device structure vertically neighboring the first microelectronic device structure. The first microelectronic device structure comprises a first memory array region and a first control logic device region and the second microelectronic device structure comprises a second memory array region and a second control logic device region. A third control logic device region vertically overlies the second microelectronic device structure. The first control logic device region includes sense amplifier devices for the first memory array region. The second control logic device region includes additional sense amplifier devices and sub word line drivers for the second memory array region. The third control logic device region includes additional sub word line drivers for the second memory array region. Related microelectronic devices, electronic systems, and methods are also described.",
    "precision_class": "structural",
    "invention_explanation": "A layered memory design that places memory arrays and their control circuits across stacked device levels to manage more storage in less space.",
    "technologies_mentioned": [
      "3D memory",
      "memory arrays",
      "control logic",
      "microelectronics"
    ]
  }
}

curl https://signals.autobound.ai/v1/signals/3d75254a-b4f5-5599-bcf9-f3037acaf320 \
  -H "X-API-KEY: $AUTOBOUND_API_KEY"

curl -X POST https://signals.autobound.ai/v1/companies/enrich \
  -H "X-API-KEY: $AUTOBOUND_API_KEY" \
  -H "Content-Type: application/json" \
  -d '{"domain":"micron.com","limit":20}'